Rockerstop
Verilog System Verilog RTL TB Development Work
We are building high performance IPs that can fit inside a variety of ASICs ranging from low power IoT ASIC to higher performance Desktop/Server ASICs. The work centers around Cache Coherency, Virtual Channels and traffic performances, Pipelining for high-speed data and control logic, Clock-gating and Power-gating etc.
The work is in an advanced prototype stage and we plan to launch fully as a product down the line. The team has people with chip-design experience in MNCs over decade and backg
More Details:
Shiv Shankar Adhikari
Ahmedabad
Remote Work
Budget - (₹37500 - 75000 INR)
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4 months ago
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